National Nanotechnology Infrastructure Network

National Nanotechnology Infrastructure Network

Serving Nanoscale Science, Engineering & Technology

Beyond Moore's Law

Beyond Moore's Law: Interdisciplinary Challenges beyond the Scaling Limits of Moore's Law

August 2 - 4, 2010

The Westin Arlington Gateway, Virginia



The NSF Workshop on “Interdisciplinary Challenges beyond the Scaling Limits of Moore's Law” was organized to explore the scientific issues and technological challenges beyond the scaling limits of Moore's Law, with the goal of positioning the U.S. at the forefront of Communications and Computation technologies beyond the physical and conceptual limits of current systems.  In accordance with the Moore's Law empirical observation, computing power doubles roughly every 18 months.  However, it is now well accepted that current approaches will reach their limits in next 10 years due to the confluence of several limitations both fundamental and physical.

Continuing evolution of electronics beyond the scaling limits of Moore’s Law is likely to require a broader re-thinking, ranging from novel materials to devices, and circuits and systems architectures so that new insights can be employed in computation and knowledge processing technologies. Current technologies provide a diversity of examples where energy - efficient systems have evolved for a variety of tasks such as embedded approaches in cell phones or specialized task-specific technologies such as in e-readers

The workshop was designed to overcome current barriers by fostering interdisciplinary debate and dialog that integrate learning from engineering, physical and life sciences. The workshop brought together experts from academia, government, and industry in the fields of life sciences, chemistry, physics, mathematics, materials science, engineering, and computer science to discuss new approaches and approaches to overcome current barriers such as charge leakage effects and  thermal limitations of additional scaling.

The workshop explored ideas at the intersection of science and engineering to address the key questions ranging from macroscale to nanoscale materials, devices and systems. Questions  addressed included the future of terascale devices, implementation strategy to minimize energy utilization, novel materials and devices, new approaches for reliability by adapting and self-healing and programming.

Promising directions are expected to include interdisciplinary merging of architectures, algorithms, materials and devices, and signaling approaches for application specificity. The premise is based on coherent engineering where synergistic approaches draw on diverse insights from electrosciences, materials sciences, physical sciences, mathematics, and computer sciences, will be necessary. An objective of the workshop is to identify promising insights and directions that project solutions for electronics in the decade of the 2020’s.

Invited speakers provided highlight insights and challenges from their disciplinary perspectives and   answered questions posed to them beforehand. The breakout sessions focused on defining the most important topics for future research and brought out opportunities in education and changes necessary in education as the complexity of the large scale integrated electronics demands interdisciplinary knowledge needs.

The workshop included presentations by leading practitioners in the fields of semiconductor devices and computer architectures, and by scientists working in the areas of physics, chemistry, mathematics, materials science, molecular electronics and nanoscale systems.  The report of this workshop  detailed important challenges, both fundamental and technological, that are likely to be at the forefront of this field for many years to come.

The workshop was held at the Westin Arlington Gateway Hotel, Arlington, Virginia on August 2-4, 2010.  It identified the technological challenges and research opportunities for NSF and the scientific community.  The proceedings of the workshop and the list of recommendations have been made  available to all participants of the workshop, NSF, other government scientists, industry and policymakers.

The findings of this report provided major support for the initiation of a new thrust area at NSF.

Full Report as presented to NSF

Abstracts, Bios, Posed Questions, and Agenda


Workshop Presentations

Programming Bits & Atoms (web presentation, press h for navigation instructions)
Neil Gershenfeld, Center for Bits & Atoms, Massachusetts Institute of Technology
(Abstract & Bio)

Are there Useful Alternative Forms of Computation? (video clip 1, video clip 2)
George Whitesides, Department of Chemistry, Harvard University

PDE Codes beyond Petascale
Paul Fischer, Mathematics & Computer Science Division, Argonne National Laboratory

Efficient Computation in the Brain
Vijay Balasubramanian, Department of Physics, University of Pennsylvania

Artificial Neural Networks and Future Computing Architectures
Ralph Linsker, Research Division, IBM Corporation

Enabling Ubiquitous Computing with Ultra-Low Power Integrated Circuits
Dennis Sylvester, Electrical Engineering & Computer Science, University of Michigan

Single-Spintronics: Prospects for Computation
Charles Marcus, Department of Physics, Harvard University

Breaking the Voltage Barrier – Devices beyond CMOS
Paul Solomon, Research Division, IBM Corporation

Reconfigurable Computing – A Plan for Post-Moore’s Law Sustainability
Greg Stitt, Department of Electrical & Computer Engineering, University of Florida

Mechanical Computing Redux – Relays for Integrated Circuit Applications
Tsu-Jae King Liu, Electrical Engineering & Computer Science, University of California, Berkeley

Adding New Capabilities to Silicon CMOS Via Deterministic Nanomaterials Assembly  (video 1, video 2)
Theresa S. Mayer, Department of Electrical Engineering, Pennsylvania State University